In the field of embedded systems and battery powered devices very often processor chips are employed which comprise on-chip memory structures. In the case of, for example, mobile phones, such devices usually contain a microprocessor or micro-controller as well as a digital signal processor (DSP) wherein both of them may comprise their own memory structures. Such on-chip memory structures normally comprise ROM structures as well as RAM structures, in particular SRAM structures. The on-chip ROM is selected for on-chip applications like storing data or code that must not be changeable anymore because of, for example, security reasons such is the case for boot ROM supporting secure boot features. The on-chip ROM structures could also be used for well-defined signal processing core algorithms which are stable and do not need to be changed or updated. On the other hand, on-chip SRAM structures are selected, for example, for functioning as a working memory for reading and writing data or for some other data or code that potentially need to be changed or updated. An important aspect is that in these on-chip memories there is provided a well-defined split into on-chip SRAM or ROM so that certain areas are pre-defined as SRAM areas and ROM areas. This pre-defined split and the sizes of SRAM and ROM memories can not be changed later on without re-spin of the semiconductor chip. On the other hand situations may arise in which it would be desirable to have the possibility to flexibly extend or replace the SRAM and/or ROM memories.